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general description the MAX9765/max9766/max9767 family combines speaker, headphone, and microphone amplifiers, all in a small thin qfn package. the MAX9765 is targeted at stereo speaker playback applications and includes a stereo bridge-tied load (btl) speaker amp, stereo headphone amp, single-ended output mic amp, input mux, and i 2 c control. the max9766 is targeted at mono speaker playback applications and includes a mono btl speaker amp, stereo headphone amp, differ- ential output mic amp, input mux, and i 2 c control. the max9767 is targeted at applications that do not require a headphone amp and includes a stereo btl speaker amp, differential output mic amp, and parallel control. these devices operate from a single 2.7v to 5.5v supply. a high 95db psrr allows these devices to operate from noisy supplies without additional power conditioning. an ultra-low 0.003% thd+n ensures clean, low distortion amplification of the audio signal. patented click-and-pop suppression eliminates audible transients on power and shutdown cycles. in speaker mode, the amplifiers can deliver up to 750mw of continuous average power into a 4 ? load. in headphone mode, the amplifier can deliver up to 65mw of continuous average power into a 16 ? load. the gain of the amplifiers is externally set, allowing maximum flexibility in optimizing output levels for a given load. the MAX9765/max9766 also feature a 2:1 input multi- plexer, allowing multiple audio sources to be selected. the various functions are controlled by either an i 2 c- compatible (MAX9765/max9766) or simple parallel control interface (max9767). all devices include two low-noise microphone pre- amps, a differential amp for internal microphones, and a single-ended amplifier for additional external micro- phones. a microphone bias output is provided, reduc- ing external component count. the MAX9765/max9766/max9767 are available in a thermally efficient 32-pin thin qfn package (5mm ? 5mm ? 0.8mm). all devices have short-circuit and thermal-overload protection (ovp) and are specified over the extended -40c to +85? temperature range. applications features ? 750mw btl stereo speaker amplifier ? 65mw stereo headphone amplifier ? 2.7v to 5.5v single-supply operation ? patented click-and-pop suppression ? low 0.003% thd+n ? low quiescent current: 13ma ? low-power shutdown mode: 5a ? mute function ? headphone sense input ? stereo 2:1 input multiplexer ? optional 2-wire, i 2 c-compatible, or parallel interface ? small 32-pin thin qfn (5mm ? 5mm ? 0.8mm) package MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux ________________________________________________________________ maxim integrated products 1 mux inl1 inl2 mux inr1 inr2 device control auxin micbias micin- micin+ spkr left spkr right headphone control micout bias mux MAX9765 simplified diagram ordering information 19-2862; rev 1; 2/05 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin-package MAX9765 etj -40 o c to +85 o c 32 thin qfn-ep* max9766 etj -40 o c to +85 o c 32 thin qfn-ep* max9767 etj -40 o c to +85 o c 32 thin qfn-ep* pin configurations and functional diagrams appear at end of data sheet. purchase of i 2 c components from maxim integrated products, inc., or one of its sublicensed associated companies, conveys a license under the philips i 2 c patent rights to use these compo- nents in an i 2 c system, provided that the system conforms to the i 2 c standard specification defined by philips. * ep = exposed paddle. pda audio systems tablet pcs cell phones notebooks digital cameras
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd to gnd ...........................................................................+6v sv dd to gnd .........................................................................+6v sv dd to v dd .........................................................................-0.3v pv dd to v dd .......................................................................?.3v pgnd to gnd.....................................................................?.3v all other pins to gnd.................................-0.3v to (v dd + 0.3v) output short-circuit duration (to v dd or gnd)..........continuous continuous input current (into any pin except power-supply and output pins) ...............................................................?0ma continuous power dissipation (t a = +70?) 32- pi n thi n qfn (d erate 26.3mw/? above +70c) ... 2105.3mw operating temperature range ...........................-40? to +85? storage temperature range .............................-65? to +150? junction temperature ......................................................+150? lead temperature (soldering, 10s) .................................+300? electrical characteristics (v dd = pv dd = 3.0v, gnd = 0, hps = mute = gnd, shdn = 3v, c bias = 1?, r in = r f = 15k ? , r l = . t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 1) parameter symbol conditions min typ max units supply voltage range v dd /pv dd inferred from psrr test 2.7 5.5 v MAX9765/max9767 12 28 speaker mode max9766 7 17 quiescent supply current (i vdd + i pvdd ) i dd headphone mode, hps = v dd 717 ma shutdown current i shdn shdn = gnd 5 18 a switching time t sw gain or input switching (MAX9765/max9766) 10 ? c bias = 1?, settled to 90% 250 turn-on/turn-off time t on/off c bias = 0.1?, settled to 90% 25 ms input bias current i bias 50 na thermal shutdown threshold 150 o c thermal shutdown hysteresis 8 o c output short-circuit current to v dd or gnd 1.2 a standby supply (sv dd ) v bias = 1.25v, v dd = 0v 230 400 standby current i svdd v bias = 1.5v, v dd = 3v 5 ? output amplifiers (speaker mode) output offset voltage v os v out_+ - v out_- , a v = 1v/v 10 45 mv v dd = 2.7v to 5.5v 72 85 power-supply rejection ratio psrr f = 1khz, v ripple = 200mv p-p 72 db r l = 8 ? = + = = + = ? = = ? + = = = = ? = ? , v out_ = 1.4v rms , bw = 22hz to 22khz 89 db
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux _______________________________________________________________________________________ 3 electrical characteristics (continued) (v dd = pv dd = 3.0v, gnd = 0, hps = mute = gnd, shdn = 3v, c bias = 1?, r in = r f = 15k ? , r l = . t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 1) parameter symbol conditions min typ max units maximum capacitive load drive c l no sustained oscillations 400 pf slew rate sr 1.4 v/? crosstalk f in = 10khz 73 db output amplifiers (headphone mode) v dd = 2.7v to 5.5v 95 f = 1khz, v ripple = 200mv p-p 75 power-supply rejection ratio psrr f = 20khz, v ripple = 200mv p-p 50 db r l = 32 ? 40 output power p out f in = 1khz, thd+n = 1%, t a = +25 o c (note 2) r l = 16 ? 35 65 mw v out = 0.7 rms , r l = 10k ? = = ? + = = = = ? = ? , v out_ = 1.4v rms , bw = 20hz to 22khz 89 db slew rate sr 0.7 v/? maximum capacitive load drive c l no sustained oscillations 200 pf crosstalk f in = 10khz 79 db bias voltage (bias) bias voltage v bias 1.4 1.5 1.6 v output resistance r bias 50 k ? microphone amplifier general v dd - v oh 35 70 r l = 100k ? v ol - gnd 50 400 v dd - v oh 80 150 output voltage swing v out r l = 2k ? v ol - gnd 70 400 mv slew rate sr a v = 10db 0.6 v/? output short-circuit current to v dd or gnd 10 ma maximum capacitive load drive c l no sustained oscillations 50 pf differential input amplifier (micin+, micin-) input offset voltage v os 25mv a v = 20db 31 input noise-voltage density e n f in = 1khz a v = 40db 11.6 nv/ hz tt hri ditrti nie thdn dd t s 1 in 1hz w hz t hz 1 ssi it w t 1 hz it eite in iin t nd 1 ?
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux 4 _______________________________________________________________________________________ electrical characteristics (continued) (v dd = pv dd = 3.0v, gnd = 0, hps = mute = gnd, shdn = 3v, c bias = 1?, r in = r f = 15k ? , r l = . t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 1) parameter symbol conditions min typ max units input resistance matching r match 1% MAX9765, a v = 4db to 39db 2 4 max9766, a v = 10db to 45db 2 4 differential gain accuracy a vdiff max9767, a v = 10db, 20db, 30db 2 4 % common-mode rejection ratio cmrr a v = 10db, f in = 1khz, v cm = 200mv p-p , r s = 2k ? 60 db v dd = 2.7v to 5.5v 62 80 f = 1khz, v ripple = 200mv p-p 80 power-supply rejection ratio psrr a v = 10db, output referred f = 20khz, v ripple = 200mv p-p 68 db common-mode input voltage range v cm 1v single-ended input amplifier (auxin) input offset voltage v os 410mv input noise-voltage density e n a v = 20db, f in = 1khz 73 nv/ hz tt hri ditrti nie thdn 1 in 1hz w hz t hz t s 1 ssi it w t 1 hz it eite in 1 ? voltage gain accuracy a v 4% v dd = 2.7v to 5.5v 65 80 f = 1khz, v ripple = 200mv p-p 76 power-supply rejection ratio psrr a v = 10db, output referred f = 20khz, v ripple = 200mv p-p 58 db microphone bias output (micbias) microphone bias output voltage v micbias v dd = 2.7v to 5.5v, i load = 500a 2.4 2.5 2.6 v output noise-voltage density e n f = 1khz 52 nv/ hz dd t ers eeti ti s in 1hz i digital inputs (mute, shdn , int/ ext ) input voltage high v ih 2v input voltage low v il 0.8 v input leakage current i in 1a max9767 micgain input (tri-state pin)) input voltage high v ih v dd v input voltage low v il gnd v input voltage mid v iz float v
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux _______________________________________________________________________________________ 5 electrical characteristics (continued) (v dd = pv dd = 3.0v, gnd = 0, hps = mute = gnd, shdn = 3v, c bias = 1?, r in = r f = 15k ? , r l = . t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 1) parameter symbol conditions min typ max units headphone sense input (hps) input voltage high v ih 0.9 x v dd v input voltage low v il 0.7 x v dd v input leakage current i in 1a 2-wire serial interface (scl, sda, add) (MAX9765/max9766) v dd > 3.6v 3 input voltage high v ih v dd 3.6v 2 v input voltage low v il 0.8 v input hysteresis 0.2 v input high leakage current i ih v in = 3v 1a input low leakage current i il v in = 0v 1a input capacitance c in 10 pf output voltage low v ol i ol = 3ma 0.4 v output current high i oh v oh = 3v 1 a timing characteristics (MAX9765/max9766) serial clock frequency f scl 400 khz bus free time between stop and start conditions t buf 1.3 ? start condition hold time t hd:sta 0.6 ? start condition setup time t su:sta 0.6 ? clock period low t low 1.3 ? clock period high t high 0.6 ? data setup time t su:dat 100 ns data hold time t hd:dat (note 3) 0 0.9 ? receive scl/sda rise time t r (note 4) 20 + 0.1c b 300 ns receive scl/sda fall time t f (note 4) 20 + 0.1c b 300 ns transmit sda fall time t f (note 4) 20 + 0.1c b 250 ns pulse width of suppressed spike t sp (note 5) 50 ns note 1: all devices are 100% production tested at +25?. all temperature limits are guaranteed by design. note 2: p out limits are tested by a combination of electrical and guaranteed by design. note 3: a device must provide a hold time of at least 300ns for the sda signal to bridge the undefined region of scl? falling edge. note 4: c b = total capacitance of one of the bus lines in picofarads. device tested with c b = 400pf. 1k ? pullup resistors connected from sda/scl to v dd . note 5: input filters on sda, scl, and add suppress noise spikes less than 50ns.
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux 6 _______________________________________________________________________________________ total harmonic distortion plus noise vs. frequency (speaker mode) MAX9765 toc01 frequency (hz) thd+n (%) 10k 1k 100 0.01 0.1 1 0.001 10 100k v dd = 5v r l = 4 ? a v = 2v/v p out = 500mw p out = 100mw p out = 250mw total harmonic distortion plus noise vs. frequency (speaker mode) MAX9765 toc02 frequency (hz) thd+n (%) 10k 1k 100 0.01 0.1 1 0.001 10 100k v dd = 5v r l = 4 ? a v = 4v/v p out = 100mw p out = 250mw p out = 500mw total harmonic distortion plus noise vs. frequency (speaker mode) MAX9765 toc03 frequency (hz) thd+n (%) 10k 1k 100 0.01 0.1 1 0.001 10 100k v dd = 3v r l = 4 ? a v = 2v/v p out = 250mw p out = 100mw p out = 500mw total harmonic distortion plus noise vs. frequency (speaker mode) MAX9765 toc04 frequency (hz) thd+n (%) 10k 1k 100 0.01 0.1 1 0.001 10 100k v dd = 3v r l = 4 ? a v = 4v/v p out = 250mw p out = 500mw p out = 100mw total harmonic distortion plus noise vs. frequency (speaker mode) MAX9765 toc05 frequency (hz) thd+n (%) 10k 1k 100 0.01 0.1 1 0.001 10 100k v dd = 5v r l = 8 ? a v = 2v/v p out = 300mw p out = 50mw p out = 150mw total harmonic distortion plus noise vs. frequency (speaker mode) MAX9765 toc06 frequency (hz) thd+n (%) 10k 1k 100 0.01 0.1 1 0.001 10 100k p out = 300mw p out = 50mw p out = 150mw v dd = 5v r l = 8 ? a v = 4v/v total harmonic distortion plus noise vs. frequency (speaker mode) MAX9765 toc07 frequency (hz) thd+n (%) 10k 1k 100 0.01 0.1 1 0.001 10 100k p out = 300mw p out = 50mw p out = 150mw v dd = 3v r l = 8 ? a v = 4v/v total harmonic distortion plus noise vs. frequency (speaker mode) MAX9765 toc08 frequency (hz) thd+n (%) 10k 1k 100 0.01 0.1 1 0.001 10 100k p out = 150mw p out = 50mw p out = 300mw v dd = 3v r l = 8 ? a v = 4v/v total harmonic distortion plus noise vs. output power (speaker mode) MAX9765 toc09 output power (w) thd+n (%) 1.00 0.75 0.50 0.25 0.01 10 1 0.1 100 0.001 01 .25 v dd = 5v r l = 4 ? a v = 2v/v f = 1khz f = 20hz f = 10khz t ypical operating characteristics (v dd = pv dd = 5v, bw = 22hz to 22khz, t a = +25?, unless otherwise noted.)
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux _______________________________________________________________________________________ 7 t ypical operating characteristics (continued) (v dd = pv dd = 5v, bw = 22hz to 22khz, t a = +25?, unless otherwise noted.) total harmonic distortion plus noise vs. output power (speaker mode) MAX9765 toc10 output power (w) thd+n (%) 0.6 0.4 0.2 0.01 10 1 0.1 100 0.001 0 0.8 v dd = 5v r l =4 ? a v = 4v/v f = 20hz f = 1khz f = 10khz total harmonic distortion plus noise vs. output power (speaker mode) MAX9765 toc11 output power (w) thd+n (%) 0.75 0.50 0.25 0.01 10 1 0.1 100 0.001 0 1.00 v dd = 3v r l = 4 ? a v = 2v/v f = 20hz f = 1khz f = 10khz total harmonic distortion plus noise vs. output power (speaker mode) MAX9765 toc12 output power (w) thd+n (%) 0.75 0.50 0.25 0.01 10 1 0.1 100 0.001 01 .00 v dd = 3v r l = 4 ? a v = 4v/v f = 20hz f = 1khz f = 10khz total harmonic distortion plus noise vs. output power (speaker mode) MAX9765 toc13 output power (w) thd+n (%) 0.6 0.4 0.2 0.01 10 1 0.1 100 0.001 0 0.8 v dd = 5v r l = 8 ? a v = 2v/v f = 20hz f = 1khz f = 10khz total harmonic distortion plus noise vs. output power (speaker mode) MAX9765 toc14 output power (w) thd+n (%) 0.6 0.4 0.2 0.01 10 1 0.1 100 0.001 00.8 v dd = 5v r l = 8 ? a v = 4v/v f = 20hz f = 1khz f = 10khz total harmonic distortion plus noise vs. output power (speaker mode) MAX9765 toc15 output power (w) thd+n (%) 0.5 0.6 0.4 0.3 0.2 0.1 0.01 10 1 0.1 100 0.001 0 0.7 v dd = 3v r l = 8 ? a v = 2v/v f = 20hz f = 1khz f = 10khz total harmonic distortion plus noise vs. output power (speaker mode) MAX9765 toc16 output power (w) thd+n (%) 0.5 0.6 0.4 0.3 0.2 0.1 0.01 10 1 0.1 100 0.001 00.7 v dd = 3v r l = 8 ? a v = 4v/v f = 20hz f = 1khz f = 10khz output power vs. load resistance (speaker mode) MAX9765 toc17 load resistance ( ? ) output power (mw) 1k 100 10 200 1000 600 800 400 1200 0 010k v cc = 5v thd+n = 10% thd+n = 1% output power vs. load resistance (speaker mode) MAX9765 toc18 load resistance ( ? ) output power (mw) 1k 100 10 100 200 800 900 500 600 700 300 400 1000 0 010k v cc = 3v thd+n = 10% thd+n = 1%
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux 8 _______________________________________________________________________________________ t ypical operating characteristics (continued) (v dd = pv dd = 5v, bw = 22hz to 22khz, t a = +25?, unless otherwise noted.) power dissipation vs. output power (speaker mode) MAX9765 toc19 output power (w) power dissipation (w) 0.75 0.50 0.25 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 0 1.00 v dd = 5v r l = 4 ? f = 1khz power dissipation vs. output power (speaker mode) MAX9765 toc20 output power (w) power dissipation (w) 0.60 0.45 0.30 0.15 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 0 0.75 v dd = 5v r l = 8 ? f = 1khz power dissipation vs. output power (speaker mode) MAX9765 toc21 output power (w) power dissipation (w) 0.75 0.50 0.25 0.1 0.2 0.3 0.4 0.5 0.6 0 0 1.00 v dd = 3v r l = 4 ? f = 1khz power dissipation vs. output power (speaker mode) MAX9765 toc22 output power (w) power dissipation (w) 0.45 0.30 0.15 0.05 0.10 0.15 0.20 0.25 0.30 0 0 0.60 v dd = 3v r l = 8 ? f = 1khz output power vs. temperature (speaker mode) MAX9765 toc23 temperature ( c) output power (mw) 35 60 10 -15 200 400 600 800 1000 1200 0 -40 85 thd+n = 10% thd+n = 1% f = 1khz r l = 4 ? output power vs. temperature (speaker mode) MAX9765 toc24 temperature ( c) output power (mw) 35 60 10 -15 100 200 300 400 500 800 700 600 0 -40 85 thd+n = 10% thd+n = 1% f = 1khz r l = 8 ? power-supply rejection ratio vs. frequency (speaker mode) MAX9765 toc25 frequency (hz) psrr (db) 10k 1k 100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 -100 10 100k v dd = 5v power-supply rejection ratio vs. frequency (speaker mode) MAX9765 toc26 frequency (hz) psrr (db) 10k 1k 100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 -100 10 100k v dd = 3v entering shutdown (speaker mode) MAX9765 toc27 200ms/div out_+ and out_- out_+ - out_- 100mv/div 500mv/div 2v/div shdn r l = 8 ? input ac-coupled to gnd
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux _______________________________________________________________________________________ 9 power-up (speaker mode) MAX9765 toc30 200ms/div out_+ and out out_+ - out 100mv/div 500mv/div 2v/div v cc r l = 8 ? input ac-coupled to gnd c bias = 1 f total harmonic distortion plus noise vs. frequency (headphone mode) MAX9765 toc31 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 1 10 100k v dd = 5v r l = 16 ? a v = 1v/v p out = 10mw p out = 25mw p out = 50mw total harmonic distortion plus noise vs. frequency (headphone mode) MAX9765 toc32 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 1 10 100k v dd = 5v r l = 16 ? a v = 2v/v p out = 50mw p out = 25mw p out = 10mw total harmonic distortion plus noise vs. frequency (headphone mode) MAX9765 toc33 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 1 10 100k v dd = 3v r l = 16 ? a v = 1v/v p out = 25mw p out = 50mw p out = 10mw t ypical operating characteristics (continued) (v dd = pv dd = 5v, bw = 22hz to 22khz, t a = +25?, unless otherwise noted.) exiting shutdown (speaker mode) MAX9765 toc28 200ms/div out_+ and out out_+ - out 100mv/div 500mv/div 2v/div shdn r l = 8 ? input ac-coupled to gnd c bias = 1 f entering power-down (speaker mode) MAX9765 toc29 200ms/div out_+ and out_- out_+ - out_- 100mv/div 500mv/div 2v/div v cc r l = 8 ? input ac-coupled to gnd total harmonic distortion plus noise vs. frequency (headphone mode) MAX9765 toc34 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 1 10 100k v dd = 3v r l = 16 ? a v = 2v/v p out = 25mw p out = 10mw p out = 50mw
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux 10 ______________________________________________________________________________________ t ypical operating characteristics (continued) (v dd = pv dd = 5v, bw = 22hz to 22khz, t a = +25?, unless otherwise noted.) total harmonic distortion plus noise vs. frequency (headphone mode) MAX9765 toc35 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 1 10 100k v dd = 5v r l = 32 ? a v = 1v/v p out = 10mw p out = 5mw p out = 20mw total harmonic distortion plus noise vs. frequency (headphone mode) MAX9765 toc36 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 1 10 100k v dd = 5v r l = 32 ? a v = 2v/v p out = 10mw p out = 5mw p out = 20mw total harmonic distortion plus noise vs. frequency (headphone mode) MAX9765 toc37 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 1 10 100k v dd = 3v r l = 32 ? a v = 1v/v p out = 10mw p out = 5mw p out = 20mw total harmonic distortion plus noise vs. frequency (headphone mode) MAX9765 toc38 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 1 10 100k v dd = 3v r l = 32 ? a v = 2v/v p out = 10mw p out = 5mw p out = 20mw total harmonic distortion plus noise vs. output power (headphone mode) MAX9765 toc39 output power (mw) thd+n (%) 100 60 80 40 20 0.001 0.1 10 100 0 120 v dd = 5v r l = 16 ? a v = 1v/v f = 1khz f = 20hz f = 10khz 1 0.01 total harmonic distortion plus noise vs. output power (headphone mode) MAX9765 toc40 output power (mw) thd+n (%) 100 60 80 40 20 0.001 0.01 0.1 100 10 1 0120 v dd = 5v r l = 16 ? a v = 2v/v f = 1khz f = 20hz f = 10khz total harmonic distortion plus noise vs. output power (headphone mode) MAX9765 toc41 output power (mw) thd+n (%) 100 60 80 40 20 0.001 0.01 0.1 100 10 1 0 120 v dd = 3v r l = 16 ? a v = 1v/v f = 1khz f = 20hz f = 10khz total harmonic distortion plus noise vs. output power (headphone mode) MAX9765 toc42 output power (mw) thd+n (%) 100 60 80 40 20 0.001 0.01 0.1 100 10 1 0 120 v dd = 3v r l = 16 ? a v = 2v/v f = 1khz f = 20hz f = 10khz output power vs. load resistance (headphone mode) MAX9765 toc43 load resistance ( ? ) output power (mw) 1k 100 10 20 100 120 140 60 80 40 160 0 1 10k v cc = 5v thd+n = 10% thd+n = 1%
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux ______________________________________________________________________________________ 11 output power vs. load resistance (headphone mode) MAX9765 toc44 load resistance ( ? ) output power (mw) 1k 100 10 20 100 120 140 60 80 40 0 1 10k v cc = 3v thd+ n = 10% thd+n = 1% power dissipation vs. output power (headphone mode) MAX9765 toc45 output power (mw) power dissipation (mw) 25 50 75 100 20 40 60 80 120 100 140 0 0 v dd = 5v f = 1khz r l = 16 ? r l = 32 ? power dissipation vs. output power (headphone mode) MAX9765 toc46 output power (mw) power dissipation (mw) 30 15 45 60 75 10 20 30 40 50 60 0 0 v dd = 3v f = 1khz r l = 16 ? r l = 32 ? output power vs. temperature (headphone mode) MAX9765 toc47 temperature ( c) output power (mw) 60 35 10 -15 20 60 40 80 100 0 -40 85 thd+n = 10% thd+n = 1% f = 1khz r l = 16 ? output power vs. temperature (headphone mode) MAX9765 toc48 temperature ( c) output power (mw) 60 35 10 -15 10 30 40 20 50 60 0 -40 85 thd+n = 10% thd+n = 1% f = 1khz r l = 32 ? power-supply rejection ratio vs. frequency (headphone mode) MAX9765 toc49 frequency (hz) psrr (db) 10k 1k 100 -90 -70 -80 -50 -60 -30 -40 -20 -10 0 -100 10 100k v dd = 5v power-supply rejection ratio vs. frequency (headphone mode) MAX9765 toc50 frequency (hz) psrr (db) 10k 1k 100 -90 -70 -80 -50 -60 -30 -40 -20 -10 0 -100 10 100k v dd = 3v entering shutdown (headphone mode) MAX9765 toc51 200ms/div out_+ hp jack 100mv/div 500mv/div 2v/div shdn r l = 16 ? input ac-coupled to gnd exiting shutdown (headphone mode) MAX9765 toc52 200ms/div out_+ hp jack 100mv/div 500mv/div 2v/div shdn r l = 16 ? input ac-coupled to gnd t ypical operating characteristics (continued) (v dd = pv dd = 5v, bw = 22hz to 22khz, t a = +25?, unless otherwise noted.)
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux 12 ______________________________________________________________________________________ t ypical operating characteristics (continued) (v dd = pv dd = 5v, bw = 22hz to 22khz, t a = +25?, unless otherwise noted.) exiting power-down (headphone mode) MAX9765 toc54 200ms/div out_+ hp jack 100mv/div 500mv/div 2v/div v cc r l = 16 ? input ac-coupled to gnd entering power-down (headphone mode) MAX9765 toc53 200ms/div out_+ hp jack 100mv/div 500mv/div 2v/div v cc r l = 16 ? input ac-coupled to gnd total harmonic distortion plus noise vs. frequency (differential input) MAX9765 toc55 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 1 10 100k v dd = 5v v out = 0.26v rms v out = 0.35v rms total harmonic distortion plus noise vs. frequency (differential input) MAX9765 toc56 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 1 10 100k v dd = 3v v out = 0.35v rms v out = 0.26v rms total harmonic distortion plus noise vs. output amplitude (differential input) MAX9765 toc57 output voltage (v rms ) thd+n (%) 2 1 0.01 10 1 0.1 100 0.001 03 v dd = 5v f = 100hz f = 1khz f = 10khz total harmonic distortion plus noise vs. output amplitude (differential input) MAX9765 toc58 output voltage (v rms ) thd+n (%) 2 1 0.01 10 1 0.1 100 0.001 03 v dd = 3v f = 100hz f = 1khz f = 10khz power-supply rejection ratio vs. frequency (differential input) MAX9765 toc59 frequency (hz) psrr (db) 10k 1k 100 -100 -80 -60 -40 -20 0 -120 10 100k v dd = 5v v dd = 3v input-referred noise (differential microphone amplifier) MAX9765 toc60 frequency (hz) 10k 1k 100 100 1000 10 10 100k input-referred noise (nv/ hz ) a v = 20db a v = 40db differential microphone amplifier small-signal transient response MAX9765 toc61 200 s/div in out 50mv/div 50mv/div a v = 4db f in = 1khz
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux ______________________________________________________________________________________ 13 differential microphone amplifier large-signal transient response MAX9765 toc62 200 s/div in out 1v/div 500mv/div a v = 4db f in = 1khz differential microphone amplifier overdriven output MAX9765 toc63 200 s/div in out 1v/div 1v/div a v = 4db f in = 1khz total harmonic distortion plus noise vs. frequency (single-ended input) MAX9765 toc64 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 1 10 100k v dd = 5v v out = 265mv rms v out = 176mv rms total harmonic distortion plus noise vs. frequency (single-ended input) MAX9765 toc65 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 1 10 100k v dd = 3v v out = 176mv rms v out = 265mv rms total harmonic distortion plus noise vs. output amplitude (single-ended input) MAX9765 toc66 output voltage (v rms ) thd+n (%) 1.5 1.0 0.5 0.01 10 1 0.1 100 0.001 02.0 v dd = 5v f = 100hz f = 1khz f = 10khz total harmonic distortion plus noise vs. output amplitude (single-ended input) MAX9765 toc67 output voltage (v rms ) thd+n (%) 1.5 1.0 0.5 0.01 10 1 0.1 100 0.001 02.0 v dd = 3v f = 100hz f = 1khz f = 10khz power-supply rejection ratio vs. frequency (single-ended input) MAX9765 toc68 frequency (hz) psrr (db) 10k 1k 100 -100 -80 -60 -40 -20 0 -120 10 100k v dd = 5v v dd = 3v input-referred noise (single-ended input microphone amplifier) MAX9765 toc69 frequency (hz) 10k 1k 100 100 200 300 400 500 600 0 10 100k input-referred noise (nv/ hz ) a v = 40db t ypical operating characteristics (continued) (v dd = pv dd = 5v, bw = 22hz to 22khz, t a = +25?, unless otherwise noted.)
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux 14 ______________________________________________________________________________________ t ypical operating characteristics (continued) (v dd = pv dd = 5v, bw = 22hz to 22khz, t a = +25?, unless otherwise noted.) single-ended microphone amplifier large-signal transient response MAX9765 toc71 200 s/div in out 1v/div 500mv/div a v = 10db f in = 1khz single-ended microphone amplifier overdriven output MAX9765 toc72 200 s/div in out 1v/div 1v/div a v = 10db f in = 1khz supply current vs. supply voltage (speaker mode) MAX9765 toc73 supply voltage (v) supply current (ma) 4.8 4.1 3.4 4 8 12 16 20 0 2.7 5.5 t a = +85 c t a = +25 c t a = -40 c supply current vs. supply voltage (headphone mode) MAX9765 toc74 supply voltage (v) supply current (ma) 4.8 4.1 3.4 2 4 6 8 10 0 2.7 5.5 t a = +85 c t a = +25 c t a = -40 c shutdown supply current vs. supply voltage MAX9765 toc75 supply voltage (v) supply current ( a) 4.8 4.1 3.4 5 10 15 20 25 30 0 2.7 5.5 t a = +85 c t a = +25 c t a = -40 c single-ended microphone amplifier small-signal transient response MAX9765 toc70 200 s/div in out 100mv/div 50mv/div a v = 10db f in = 1khz
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux ______________________________________________________________________________________ 15 pin description pin m a x9 7 6 5 m a x9 7 6 6 m a x9 7 6 7 name function 111 shdn active-low shutdown. connect shdn to v dd for normal operation. 2, 7, 18 2, 7, 18 2, 7, 8, 18, 23, 24, 27, 32 n.c. no connection. not internally connected. 33 6 outl+ left-channel bridged amplifier positive output. outl+ also serves as the left-channel headphone amplifier output. 4, 21 4, 21 4, 21 pv dd output amplifier power supply. connect pv dd to v dd . 5, 20 5, 20 5, 20 pgnd power ground. connect pgnd to gnd. 66 3 outl- left-channel bridged amplifier negative output 88 inl2 left-channel input 2 99 inl1 left-channel input 1 10 10 10 micin+ differential microphone amplifier noninverting input 11 11 11 micin- differential microphone amplifier inverting input 12 12 12 auxin single-ended microphone amplifier input 13 13 13 v dd power supply 14 14 14 sv dd standby power supply. connect to a standby power supply that is always on, or connect to v dd through a schottky diode and bypass with a 220? capacitor to gnd. short to v dd if clickless operation is not essential. 15 15 15 micbias microphone bias output. bypass micbias with a 1? capacitor to gnd. 16 micout microphone amplifier output 17 17 gainr right-channel gain set 19 19 outr- right-channel bridged amplifier negative output 22 22 22 outr+ right-channel bridged amplifier positive output. outr+ also serves as the right-channel headphone amplifier output. 23 add address select. a logic high sets the address lsb to 1, a logic low sets the address lsb to 0. 24 24 sda bidirectional serial data i/o 25 25 scl serial clock line 26, 29 26, 29 29 gnd ground 27 27 inr2 right-channel input 2 28 28 inr1 right-channel input 1 30 30 hps headphone sense input 31 31 31 bias dc bias bypass. see bias capacitor section for capacitor selection. connect c bias capacitor from bias to gnd. 32 32 gainl left-channel gain set ?616 micout+ microphone amplifier positive output
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux 16 ______________________________________________________________________________________ detailed description the MAX9765/max9766/max9767 feature 750mw btl speaker amplifiers, 65mw headphone amplifiers, input multiplexers, headphone sensing, differential and sin- gle-ended input microphone amplifiers, and compre- hensive click-and-pop suppression. the MAX9765/ max9766 are controlled through an i 2 c-compatible, 2- wire serial interface. the max9767 is controlled through three logic inputs: mute, shdn , int (see the selector guide ). the MAX9765 family features excep- tional psrr (95db at 1khz), allowing these devices to operate from noisy digital supplies without the need for a linear regulator. the speaker amplifiers use a btl configuration. the MAX9765/max9766 main amplifiers are composed of an input amplifier and an output amplifier. resistor r in sets the input amplifier? gain, and resistor r f sets the output amplifier? gain. the output of these two ampli- fiers serves as the input to a slave amplifier configured as an inverting unity-gain follower. this results in two outputs, identical in magnitude, but 180 out of phase. the overall gain of the speaker amplifiers is twice the product of the two amplifier gains (see the gain-setting resistor section). a unique feature of this architecture is that there is no phase inversion from input to output. the max9767 does not use a two-stage input amplifier and therefore has phase inversion from input to output. when configured as a headphone (single-ended) ampli- fier, the slave amplifier is disabled, muting the speaker and the main amplifier drives the headphone. the MAX9765/max9766/max9767 can deliver 700mw of continuous average power into a 4 ? load with less than 1% thd+n in speaker mode. the MAX9765/max9766 can deliver 70mw of continuous average power into a 16 ? load with less than 1% thd+n in headphone mode. the speaker amplifiers also feature thermal- overload and short-circuit current protection. all devices feature microphone amplifiers with both dif- ferential and single-ended inputs. differential input is intended for use with internal microphones. single- ended input is intended for use with external (auxiliary) microphones. the differential input configuration is par- ticularly effective when layout constraints force the microphone amplifier to be physically remote from the ecm microphone and/or the rest of the audio circuitry. the max9766/max9767 feature a complementary out- put, creating an ideal interface with codecs and other devices with differential inputs. all devices also feature an internal microphone bias generator. amplifier common-mode bias these devices feature an internally generated com- mon-mode bias voltage of 1.5v referenced to gnd. bias provides both click-and-pop suppression and sets the dc bias level for the audio signal. bias is inter- nally connected to the noninverting input of each speaker amplifier (see the typical application circuit ). choose the value of the bypass capacitor as described in the bias capacitor section. input multiplexer the MAX9765/max9766 feature a 2:1 input multiplexer on the front end of each amplifier. the multiplexer is controlled by bit 1 in the control register. a logic low pin description (continued) pin m a x9 7 6 5 m a x9 7 6 6 m a x9 7 6 7 name function ?917 micout- microphone amplifier negative output ? 3 gainm mono mode gain set 9 inl left-channel input 25 int/ ext internal (differential) or external (single-ended) input select. drive int /ext low to select internal or high to select external microphone amplifier. 26 micgain microphone amplifier gain set. tri-state pin. connect to v dd for gain = 10db, float for gain = 20db, and to gnd for gain = 30db. 28 inr right-channel input 30 mute mute input ? p exposed pad. connect to ground plane of pc board to optimize heatsinking.
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux ______________________________________________________________________________________ 17 selects input in_1 and a logic high selects input in_2. both right- and left-channel multiplexers are controlled by the same input. the input multiplexer can also be used to further expand the number of gain options available from the MAX9765/max9766. connect the audio source to the device through two different input resistors for multiple gain configurations (figure 1). additionally, the input multiplexer allows a speaker equalization network to be switched into the speaker signal path. this is typically useful in optimizing acoustic response from speakers with small physical dimensions. mono mode the mono max9766 incorporates a mixer/attenuator (see the functional diagram ). in speaker (mono) mode, the mixer/attenuator combines the two stereo inputs (inl_ and inr_) and attenuates the resultant signal by a factor of 2. this allows for full reproduction of a stereo signal through a single speaker while maintaining opti- mum headroom. the resistor connected between gainm and outl+ sets the device gain in speaker mode. this allows the speaker amplifier to have a dif- ferent gain and feedback network from the headphone amplifier. headphone sense disable input the headphone sensing function can be disabled by the hps_d bit (MAX9765/max9766). hps_d bit deter- mines whether the device is in automatic-detection mode, or fixed-mode operation. headphone sense input (hps) when the MAX9765/max9766 are in automatic head- phone-detection mode, the state of the headphone sense input (hps) determines the operating mode of the device. a voltage on hps less than 0.7 ? v dd sets the device to speaker mode. a voltage greater than 0.9 ? v dd disables the inverting bridge amplifier (out_-), which mutes the speaker amplifier and sets the device into headphone mode. connect hps to the control pin of a 3-wire headphone jack as shown in figure 2. with no headphone present, the resistive voltage-divider created by r1 and r2 sets the voltage on hps to 44mv, setting the device to speak- er mode. when a headphone plug is inserted into the jack, the control pin is disconnected from the tip contact, and hps is pulled to v dd through r1, setting the device into headphone mode. place a resistor in series with the control pin and hps (r3) to prevent any audio signal from coupling into hps when the device is in speaker mode. shutdown the MAX9765/max9766/max9767 feature a 5a, low- power shutdown mode that reduces quiescent current consumption and extends battery life. the drive and microphone amplifiers and the bias circuitry are dis- abled, the amplifier outputs (out_/mic_) go high impedance, and bias and micbias are driven to gnd. the digital section of the MAX9765/max9766 remains active when the device is shut down through the inter- face. a logic high on bit 0 of the shdn register places the MAX9765/max9766 in shutdown. a logic low enables the device. a logic low on the shdn input places the devices into shutdown mode, disables the interface, and resets the i 2 c registers to a default state. a logic high on shdn enables the device. a logic high on shdn enables the devices. mute all devices feature a mute mode. when the device is muted, the input is disconnected from the amplifiers. mute only affects the power amplifiers, and does not shut down the device. the MAX9765/max9766 mute mode is selected by writing to the mute register (see command byte definitions). the left and right channels can be independently muted. the max9767 features an active-high mute input that mutes both channels. int /ext the max9767 microphone amplifier input configuration is controlled by the int /ext input. a logic low in int /ext selects internal (differential) microphone mode. a logic high selects external (single-ended) mode. click-and-pop suppression the MAX9765/max9766/max9767 feature maxim? patented comprehensive click-and-pop suppression. during startup and shutdown, the common-mode bias voltage of the amplifiers is slowly ramped to and from the dc bias point using an s-shaped waveform. in MAX9765 audio input 15k ? 30k ? in_1 in_2 figure 1. using the input multiplexer for gain setting
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux 18 ______________________________________________________________________________________ headphone mode, this waveform shapes the frequency spectrum, minimizing the amount of audible compo- nents present at the headphone. in speaker mode, the btl amplifiers start up in the same fashion as in head- phone mode. when entering shutdown, both amplifier outputs ramp to gnd quickly and simultaneously. the devices can also be connected to a standby power source that ensures that the device undergoes its full shutdown cycle even after power has been removed. the value of the capacitor on the bias pin affects the click-and-pop energy. for optimum click/pop perfor- mance, use a 1? capacitor. standby power supply (sv dd ) the MAX9765/max9766/max9767 feature a patented system that provides clickless power-down when power is removed from the device. sv dd is an optional secondary supply that powers the device through its shutdown cycle when v dd is removed. during this cycle, the amplifier output dc level slowly ramps to gnd, ensuring clickless power-down. if clickless power-down is required, connect sv dd to either a sec- ondary power supply that is always on, or connect a reservoir capacitor from sv dd to gnd. sv dd does not need to be connected to either a secondary power supply or reservoir capacitor for normal device opera- tion. if click-and-pop suppression during power-down is not required, connect sv dd to v dd directly. the clickless power-down cycle only occurs when the device is in headphone mode. the speaker mode is inherently clickless, the differential architecture cancels the dc shift across the speaker. the MAX9765/ max9766/max9767 btl outputs are pulled to gnd quickly and simultaneously, resulting in no audible components. if the MAX9765/max9766/max9767 are only used as speaker amplifiers, then reservoir capaci- tors or secondary supplies are not necessary. when using a reservoir capacitor, a 220? capacitor provides optimum charge storage for the shutdown cycle for all conditions. if a smaller reservoir capacitor is desired, decrease the size of c bias . a smaller c bias causes the output dc level to decay at a faster rate, increasing the audible content at the speaker, but reducing the duration of the shutdown cycle. digital interface the MAX9765/max9766 feature an i 2 c/smbus-compat- ible 2-wire serial interface consisting of a serial data line (sda) and a serial clock line (scl). sda and scl facilitate bidirectional communication between the MAX9765/max9766 and the master at clock rates up to 400khz. figure 3 shows the 2-wire interface timing dia- gram. the MAX9765/max9766 are transmit/receive slave-only devices, relying upon a master to generate a clock signal. the master (typically a microcontroller) ini- tiates data transfer on the bus and generates scl to permit that transfer. a master device communicates to the MAX9765/ max9766 by transmitting the proper address followed by a command and/or data words. each transmit sequence is framed by a start (s) or repeated start (s r ) condition and a stop (p) condition. each word transmitted over the bus is 8 bits long and is always followed by an acknowledge clock pulse. the MAX9765/max9766 sda and scl amplifiers are open-drain outputs requiring a pullup resistor to gener- ate a logic-high voltage. series resistors in line with sda and scl are optional. these series resistors pro- tect the input stages of the devices from high-voltage spikes on the bus lines, and minimize crosstalk and undershoot of the bus signals. bit transfer one data bit is transferred during each scl clock cycle. the data on sda must remain stable during the high period of the scl clock pulse. changes in sda while scl is high are control signals (see the start and stop conditions section). sda and scl idle high when the i 2 c bus is not busy. start and stop conditions when the serial interface is inactive, sda and scl idle high. a master device initiates communication by issu- ing a start condition. a start condition is a high-to- low transition on sda with scl high. a stop condition is a low-to-high transition on sda while scl is high (figure 4). a start condition from the master signals the beginning of a transmission to the MAX9765/ max9766. the master terminates transmission by issu- ing the stop condition; this frees the bus. if a repeat- ed start condition is generated instead of a stop MAX9765 max9766 r1 680k ? r2 10k ? hps outl+ outr+ r3 47k ? 3v 10k ? figure 2. hps configuration circuit
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux ______________________________________________________________________________________ 19 condition, the bus remains active. when a stop con- dition or incorrect address is detected, the MAX9765/max9766 internally disconnects scl from the serial interface until the next start condition, mini- mizing digital noise and feedthrough. early stop conditions the MAX9765/max9766 recognize a stop condition at any point during the transmission except if a stop con- dition occurs in the same high pulse as a start condi- tion (figure 5). this condition is not a legal i 2 c format; at least one clock pulse must separate any start and stop conditions. repeated start conditions a repeated start (s r ) condition may indicate a change of data direction on the bus. such a change occurs when a command word is required to initiate a read operation. s r may also be used when the bus master is writing to several i 2 c devices and does not want to relinquish control of the bus. the MAX9765/ max9766 serial interface supports continuous write operations with or without an s r condition separating them. continuous read operations require s r conditions because of the change in direction of data flow. acknowledge bit (ack) the acknowledge bit (ack) is the ninth bit attached to any 8-bit data word. the receiving device always gen- erates ack. the MAX9765/max9766 generate an ack when receiving an address or data by pulling sda low during the ninth clock period. when transmitting data, the MAX9765/max9766 wait for the receiving device to generate an ack. monitoring ack allows for detection of unsuccessful data transfers. an unsuccessful data transfer occurs if a receiving device is busy or if a sys- tem fault has occurred. in the event of an unsuccessful data transfer, the bus master should reattempt commu- nication at a later time. slave address the bus master initiates communication with a slave device by issuing a start condition followed by a 7-bit slave address (figure 6). when idle, the MAX9765/ max9766 wait for a start condition followed by its slave address. the serial interface compares each address value bit-by-bit, allowing the interface to power down immediately if an incorrect address is detected. the lsb of the address word is the read/ write (r/ w ) bit. r/ w indicates whether the master is writing to or reading from the MAX9765/max9766 (r/ w = 0 selects the write condition, r/ w = 1 selects the read condition). after receiving the proper address, the MAX9765/ max9766 issue an ack by pulling sda low for one clock cycle. the MAX9765 has a factory/user-programmed address (table 2). the max9766 has a factory-programmed address: 1001011. scl sda start condition stop condition repeated start condition start condition t hd, sta t hd, sta t hd, sta t sp t buf t su, sto t low t su, dat t hd, dat t high t r t f figure 3. 2-wire serial interface timing diagram scl sda ssrp figure 4. start/stop conditions
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux 20 ______________________________________________________________________________________ write data format there are three registers that configure the MAX9765/max9766: the mute register, shdn register, and control register. in write data mode (r/ w = 0), the register address and data byte follow the device address (figure 7). mute register the mute register (01hex) is a read/write register that sets the mute status of the device. bit 3 (mutel) of the mute register controls the left channel, bit 4 (muter) controls the right channel. a logic high mutes the respective channel, a logic low brings the channel out of mute. shdn register the shdn register (02hex) is a read/write register that controls the power-up state of the device. a logic high in bit 0 of the shdn register shuts down the device; a logic low turns on the device. a logic high is required in bits 2 to 7 to reset all registers to their default register settings. control register the control register (03hex) is a read/write register that determines the device configuration. bit 1 (in 1 /in2) controls the input multiplexer, a logic high selects input 1, a logic low selects input 2. bit 2 (hps_en) controls the headphone sensing. a logic low configures the device in automatic headphone detection mode. a logic high disables the hps input. bit 3 (int/ext) con- trols the microphone amplifier inputs. a logic low selects differential (internal) input mode. a logic high selects single-ended (external) input mode. bit 4 (spkr/hp) selects the amplifier operating mode when scl sda stop start scl sda illegal stop start legal stop condition illegal early stop condition figure 5. early stop condition sa6a 5a4a3a2a1a0r/w figure 6. slave address byte definition add connection i 2 c address gnd 100 1000 v dd 100 1001 sda 100 1010 scl 100 1011 table 2. i 2 c slave addresses register address 0000 0001 bit name value description 7x don? care 6x don? care 5x don? care 0* unmute right channel 4 muter 1 mute right channel 0* unmute left channel 3 mutel 1m ute left channel 2x don? care 1x don? care 0x don? care table 3. mute register format * default state. hps_d bit hps spkr/ hp bit mode 00x btl 01xse 1x0 btl 1x1se table 1. hps setting (MAX9765/max9766)
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux ______________________________________________________________________________________ 21 hps_en = 1. a logic high selects speaker mode, a logic low selects headphone mode. bits 5 to 7 (mg0-2) control the gain of the microphone amplifiers (table 5). read data format in read mode (r/ w = 1), the MAX9765/max9766 write the contents of the selected register to the bus. the direction of the data flow reverses following the address acknowledge by the MAX9765/max9766. the master device reads the contents of all registers, including the read-only status register. table 7 shows the status register format. figure 7 shows an example read data sequence. register address 0000 0010 bit name value description 0* 7 reset 1 reset device 0* 6 reset 1 reset device 0* 5 reset 1 reset device 0* 4 reset 1 reset device 0* 3 reset 1 reset device 0* 2 reset 1 reset device 1x don? care 0* normal operation 0 shdn 1 shutdown table 4. shdn register format * default state. register address 0000 0011 bit name value description 7 mg2 6 mg1 5 mg0 microphone amplifier gain set; 3-bit code sets the gain of the microphone amplifiers (table 6) 0* speaker mode selected 4 spkr/hp 1 headphone mode selected 0* differential input selected 3 int /ext 1 single-ended input selected 0* automatic headphone detection enabled 2 hps_d 1 automatic headphone detection disabled (hps ignored) 0* input 1 selected 1 in1 /in2 1i nput 2 selected 0x don? care table 5. control register format s address 7 bits 8 bits 8 bits 1 wr ack command ack data ack p i 2 c slave address. selects device. register address. selects register to be written to. register data. i 2 c slave address. selects device. data from selected register. s address 7 bits 8 bits 8 bits 1 wr ack command ack data p i 2 c slave address. selects device. register address. selects register to be read. s address 7 bits wr ack figure 7. write/read data format example
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux 22 ______________________________________________________________________________________ i 2 c compatibility the MAX9765/max9766 are compatible with existing i 2 c systems. scl and sda are high-impedance inputs; sda has an open drain that pulls the data line low during the ninth clock pulse. the communication protocol supports the standard i 2 c 8-bit communications. the general call address is ignored. the MAX9765/max9766 addresses are compatible with the 7-bit i 2 c addressing protocol only. no 10-bit formats are supported. applications information btl amplifiers the MAX9765/max9766/max9767 feature speaker amplifiers designed to drive a load differentially, a con- figuration referred to as bridge-tied load (btl). the btl configuration (figure 8) offers advantages over the sin- gle-ended configuration, where one side of the load is connected to ground. driving the load differentially doubles the output voltage compared to a single- ended amplifier under similar conditions. thus, the devices?differential gain is twice the closed-loop gain of the input amplifier. the effective gain is given by: substituting 2 x v out(p-p) for v out(p-p) into the follow- ing equations yields four times the output power due to doubling of the output voltage: since the outputs are differential, there is no net dc voltage across the load. this eliminates the need for dc-blocking capacitors required for single-ended amplifiers. these capacitors can be large, expensive, consume board space, and degrade low-frequency performance. single-ended headphone amplifier the MAX9765/max9766 can be configured as single- ended headphone amplifiers through software or by sensing the presence of a headphone plug (hps). in headphone mode, the inverting output of the btl amplifier is disabled, muting the speaker. the gain is 1/2 that of the device in speaker mode, and the output power is reduced by a factor of 4. in headphone mode, the load must be capacitively coupled to the device, blocking the dc bias voltage from the load (see the typical application circuit and the output-coupling capacitor section ). microphone amplifiers differential microphone amplifier the MAX9765/max9766/max9767 feature a low-noise, high cmrr, differential input microphone amplifier. the differential input structure is almost essential in noisy digital systems where amplification of low-amplitude analog signals is necessary such as notebooks and pdas. when properly employed, the differential input architecture offers the following advantages: v v p v r rms out p p out rms l = = ? () 22 2 a r r vd f in = 2 mg2 mg1 mg0 MAX9765 diff gain (db) max9766 diff gain (db) single-ended gain (db) 0* 0* 0* 4 10 10 00 1 9 15 15 01 0 14 20 20 01 1 19 25 25 10 0 24 30 29 10 1 29 35 34 11 0 34 40 36 11 1 39 45 40 table 6. microphone gain setting * default state.
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux ______________________________________________________________________________________ 23 improved psrr. higher ground noise immunity. microphone and preamplifier can be placed physi- cally farther apart, easing pc board layout require- ments. common-mode rejection ratio common-mode rejection ratio (cmrr) refers to an amplifier? ability to reject any signal applied equally to both inputs. in the case of amplifying a low-level micro- phone signal in noisy digital environments, cmrr is a key figure of merit. in audio circuits, cmrr is given by: where a dm is the differential gain, a cm is the common- mode gain, ? v incm is the change in input common- mode voltage (in+ and in- connected together), and v indiff is the differential input voltage. typical input voltage magnitudes are small enough such that the output is not clipped in either differential or common-mode application. the MAX9765/max9766/ max9767 differential microphone amplifier architecture cmrr actually improves as a dm increases?n addi- tional advantage to the use of differential inputs. power dissipation and heat sinking under normal operating conditions, the MAX9765/ max9766/max9767 can dissipate a significant amount of power. the maximum power dissipation for each package is given in the absolute maximum ratings section under continuous power dissipation or can be calculated by the following equation: where t j(max) is +150?, t a is the ambient tempera- ture, and ja is the reciprocal of the derating factor in ?/w as specified in the absolute maximum ratings p tt disspkg max j max a ja () () = ? cmrr db a a v v dm cm indiff incm () == ? +1 v out(p-p) 2 x v out(p-p) v out(p-p) -1 figure 8. bridge-tied load configuration register address 0000 0000 bit name value description 0 device temperature below thermal limit 7 thrm 1 device temperature exceeding thermal limit 0 outr- current below current limit 6 ampr- 1 outr- current exceeding current limit 0 outr+ current below current limit 5 ampr+ 1 outr+ current exceeding current limit 0 outl- current below current limit 4 ampl- 1 outl- current exceeding current limit 0 outl+ current below current limit 3am pl+ 1 outl+ current exceeding current limit 0 device in speaker mode 2 hpsts 1 device in headphone mode 1x don? care 0x don? care table 7. status register format
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux 24 ______________________________________________________________________________________ section. for example, ja of the qfn package is +42?/w. the increase in power delivered by the btl configura- tion directly results in an increase in internal power dis- sipation over the single-ended configuration. the maximum power dissipation for a given v dd and load is given by the following equation: if the power dissipation for a given application exceeds the maximum allowed for a given package, either reduce v dd , increase load impedance, decrease the ambient temperature, or add heatsinking to the device. large output, supply, and ground pc board traces improve the maximum power dissipation in the package. thermal-overload protection limits total power dissipa- tion in these devices. when the junction temperature exceeds +150?, the thermal-protection circuitry dis- ables the amplifier output stage. the amplifiers are enabled once the junction temperature cools by 8?. this results in a pulsing output under continuous ther- mal-overload conditions as the device heats and cools. component selection gain-setting resistors external feedback components set the gain of the MAX9765/max9766/max9767. resistor r in sets the gain of the input amplifier (a vin ) and resistor r f sets the gain of the second-stage amplifier (a vout ): combining a vin and a vout , r in and r f set the single- ended gain of the device as follows: as shown, the two-stage amplifier architecture results in a noninverting gain configuration, preserving relative phase through the MAX9765/max9766. the gain of the device in btl mode is twice that of the single-ended mode. choose r in between 10k ? and 15k ? and r f between 15k ? and 100k ? . input filter the input capacitor (c in ), in conjunction with r in , forms a highpass filter that removes the dc bias from an incoming signal. the ac-coupling capacitor allows the amplifier to bias the signal to an optimum dc level. assuming zero-source impedance, the -3db point of the highpass filter is given by: choose r in according to the gain-setting resistors section. choose the c in such that f -3db is well below the lowest frequency of interest. setting f -3db too high affects the amplifier? low-frequency response. use capacitors whose dielectrics have low-voltage coeffi- cients, such as tantalum or aluminum electrolytic. capacitors with high-voltage coefficients, such as ceramics, may result in an increased distortion at low frequencies. other considerations when designing the input filter include the constraints of the overall system, the actual frequency band of interest, and click-and- pop suppression. although high-fidelity audio calls for a flat gain response between 20hz and 20khz, portable voice-reproduction devices such as cellular phones and two-way radios need only concentrate on the frequency range of the spoken human voice (typi- cally 300hz to 3.5khz). in addition, speakers used in portable devices typically have a poor response below 150hz. taking these two factors into consideration, the input filter may not need to be designed for a 20hz to 20khz response, saving both board space and cost due to the use of smaller capacitors. f rc db in in ? = 3 1 2 a r r max vin f in =? () 9767 aa a k r r k r r max max vv in vout in ff in = =? ? ? ? ? ? ? ? ? ? ? ? ? ? =+ ? ? ? ? ? ? 15 15 9765 9766 ? ? (/) a k r a r k vin in vout f =? ? ? ? ? ? ? =? ? ? ? ? ? ? 15 15 ? ? , p v r diss max dd l () = 2 2 2
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux ______________________________________________________________________________________ 25 output-coupling capacitor the MAX9765/max9766/max9767 require output-cou- pling capacitors to operate in single-ended (head- phone) mode. the output-coupling capacitor blocks the dc component of the amplifier output, preventing dc current from flowing to the load. the output capacitor and the load impedance form a highpass filter with a -3db point determined by: as with the input capacitor, choose c out such that f -3db is well below the lowest frequency of interest. setting f -3db too high affects the amplifier? low-fre- quency response. load impedance is a concern when choosing c out . load impedance can vary, changing the -3db point of the output filter. a lower impedance increases the cor- ner frequency, degrading low-frequency response. select c out such that the worst-case load/c out com- bination yields an adequate response. select capaci- tors with low esr. bias capacitor bias is the output of the internally generated 1.5vdc bias voltage. the bias bypass capacitor, c bias , improves psrr and thd+n by reducing power supply and other noise sources at the common-mode bias node, and also generates the clickless/popless, start- up/shutdown dc bias waveforms for the speaker ampli- fiers. bypass bias with a 1f capacitor to gnd. smaller capacitor values produce faster turn-on/off times and may impact the click/pop levels. supply bypassing proper power-supply bypassing ensures low-noise, low-distortion performance. place a 0.1? ceramic capacitor from v dd to gnd. add additional bulk capacitance as required by the application. bypass pv dd with a 100? capacitor to gnd. locate bypass capacitors as close to the device as possible. layout and grounding good pc board layout is essential for optimizing perfor- mance. use large traces for the power-supply inputs and amplifier outputs to minimize losses due to para- sitic trace resistance, as well as route heat away from the device. good grounding improves audio perfor- mance, minimizes crosstalk between channels, and prevents any digital switching noise from coupling into the audio signal. if digital signal lines must cross over or under audio signal lines, ensure that they cross per- pendicular to each other. the MAX9765/max9766/max9767 thin qfn packages feature exposed thermal pads on their undersides. this pad lowers the package? thermal resistance by provid- ing a direct heat conduction path from the die to the printed circuit board. connect the pad to signal ground by using a large pad, or multiple vias to the ground plane. f rc db l out ? = 3 1 2
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux 26 ______________________________________________________________________________________ pv dd v dd bias 0.1 f 0.1 f 0.1 f 0.1 f 1 f 0.47 f 15k ? 15k ? 15k ? 2.2k ? 2.2k ? 220 f 220 f 0.47 f 15k ? 0.47 f 15k ? 0.47 f 15k ? sv dd *c svdd inl1 inl2 inr1 inr2 scl sda add micout shdn micbias in+ in- aux_in hps gainr outr+ outr- gainl outl+ outl- hpf hpf codec microcontroller MAX9765 *c svdd is only required if low click-and-pop levels are necessary during power-down. t ypical application circuit
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux ______________________________________________________________________________________ 27 MAX9765 2:1 input mux inl1 15k ? pv dd sv dd c svdd v dd v dd gainl outl+ outl- 15k ? 15k ? 15k ? audio input audio input inl2 bias bias 2:1 input mux inr1 15k ? gainr outr+ outr- 15k ? 15k ? 15k ? audio input audio input inr2 scl sda add auxin i 2 c logic hps hps micout gnd shdn mic bias 2:1 output mux micbias micin+ micin- 0.47 f 0.1 f 1 f 15k ? 0.47 f 15k ? 0.47 f 15k ? 0.47 f 15k ? 0.1 f 2.2k ? 2.2k ? 0.1 f 0.1 f * v dd 680k ? 15k ? 15k ? 220 f 220 f 47k ? 10k ? *c svdd is only required if low click-and-pop levels are necessary during power-down. 0.1 f functional diagrams
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux 28 ______________________________________________________________________________________ max9766 2:1 input mux 15k ? pv dd sv dd c svdd v dd gainl outl- 15k ? 15k ? 15k ? bias 2:1 input mux 15k ? gainr outr 15k ? scl sda hps hps micout+ gnd shdn mic bias 2:1 output mux micout- micbias micin+ micin- i 2 c logic v dd * inl1 audio input audio input inl2 0.47 f 15k ? 0.47 f 15k ? bias inr1 audio input audio input inr2 0.47 f 1 f 15k ? 0.47 f 15k ? auxin 0.1 f 2.2k ? 2.2k ? 0.1 f 0.1 f gain mux gainm outl+ 15k ? 15k ? 220 f v dd 680k ? 15k ? 220 f 47k ? 10k ? 0.1 f 0.1 f *c svdd is only required if low click-and-pop levels are necessary during power-down. functional diagrams (continued)
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux ______________________________________________________________________________________ 29 bias mic bias output mux gain control outl+ outl- outr+ outr+ micout+ micout- micin- micin+ gadj micbias auxin inr intext mute v dd inl shdn max9767 15k ? 15k ? 15k ? 15k ? 15k ? 15k ? pv dd gnd pgnd 2.2k ? 2.2k ? 15k ? audio input v dd 15k ? audio input 0.1 f 0.1 f 0.1 f 0.47 f 0.1 f 1 f 0.1 f 0.1 f functional diagrams (continued)
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux 30 ______________________________________________________________________________________ 1 2 n.c. 3 outl+ 4 pv dd 5 pgnd 6 outl- 7 n.c. 8 910111 213141516 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 inl2 shdn add outr+ pv dd pgnd outr- n.c. gainr sda inl1 micin+ micin- auxin v dd sv dd micbias micout gainl bias hps gnd inr1 inr2 gnd scl MAX9765 thin qfn pin configurations 1 2 n.c. 3 outl- 4 pv dd 5 pgnd 6 outl+ 7 n.c. 8 910111 213141516 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 n.c. shdn n.c. outr+ pv dd pgnd outr- n.c. micout- n.c. inl micin+ micin- auxin v dd sv dd micbias micout+ n.c. bias mute gnd inr n.c. micgain int/ext max9767 thin qfn 1 2 n.c. 3 outl+ 4 pv dd 5 pgnd 6 outl- 7 n.c. 8 910111 213141516 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 inl2 shdn gainm outr+ pv dd pgnd micout- n.c. gainr sda inl1 micin+ micin- auxin v dd sv dd micbias micout+ gainl bias hps gnd inr1 inr2 gnd max9766 thin qfn scl
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux ______________________________________________________________________________________ 31 chip information MAX9765 transistor count: 4829 max9766 transistor count: 4533 max9767 transistor count: 4731 process: bicmos selector guide part control interface speaker amplifier input multiplexer headphone amplifier microphone amplifier output MAX9765 i 2 c compatible stereo ? stereo single ended max9766 i 2 c compatible mono ? stereo differential max9767 parallel stereo differential
MAX9765/max9766/max9767 750mw audio amplifiers with headphone amp, microphone preamp, and input mux maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 _____________________ 32 2005 maxim integrated products printed usa is a registered trademark of maxim integrated products, inc. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) qfn thin.eps d2 (nd-1) x e e d c pin # 1 i.d. (ne-1) x e e/2 e 0.08 c 0.10 c a a1 a3 detail a e2/2 e2 0.10 m c a b pin # 1 i.d. b 0.35x45 d/2 d2/2 l c l c e e l c c l k l l detail b l l1 e xxxxx marking g 1 2 21-0140 package outline, 16, 20, 28, 32l thin qfn, 5x5x0.8mm -drawing not to scale- l common dimensions 3.35 3.15 t2855-1 3.25 3.35 3.15 3.25 max. 3.20 exposed pad variations 3.00 t2055-2 3.10 d2 nom. min. 3.20 3.00 3.10 min. e2 nom. max. ne nd pkg. codes 1. dimensioning & tolerancing conform to asme y14.5m-1994. 2. all dimensions are in millimeters. angles are in degrees. 3. n is the total number of terminals. 4. the terminal #1 identifier and terminal numbering convention shall conform to jesd 95-1 spp-012. details of terminal #1 identifier are optional, but must be located within the zone indicated. the terminal #1 identifier may be either a mold or marked feature. 5. dimension b applies to metallized terminal and is measured between 0.25 mm and 0.30 mm from terminal tip. 6. nd and ne refer to the number of terminals on each d and e side respectively. 7. depopulation is possible in a symmetrical fashion. 8. coplanarity applies to the exposed heat sink slug as well as the terminals. 9. drawing conforms to jedec mo220, except exposed pad dimension for t2855-1, t2855-3 and t2855-6. notes: symbol pkg. n l1 e e d b a3 a a1 k 10. warpage shall not exceed 0.10 mm. jedec t1655-1 3.20 3.00 3.10 3.00 3.10 3.20 0.70 0.80 0.75 4.90 4.90 0.25 0.25 0 -- 4 whhb 4 16 0.35 0.30 5.10 5.10 5.00 0.80 bsc. 5.00 0.05 0.20 ref. 0.02 min. max. nom. 16l 5x5 3.10 t3255-2 3.00 3.20 3.00 3.10 3.20 2.70 t2855-2 2.60 2.60 2.80 2.70 2.80 l 0.30 0.50 0.40 -- - -- - whhc 20 5 5 5.00 5.00 0.30 0.55 0.65 bsc. 0.45 0.25 4.90 4.90 0.25 0.65 - - 5.10 5.10 0.35 20l 5x5 0.20 ref. 0.75 0.02 nom. 0 0.70 min. 0.05 0.80 max. -- - whhd-1 28 7 7 5.00 5.00 0.25 0.55 0.50 bsc. 0.45 0.25 4.90 4.90 0.20 0.65 - - 5.10 5.10 0.30 28l 5x5 0.20 ref. 0.75 0.02 nom. 0 0.70 min. 0.05 0.80 max. -- - whhd-2 32 8 8 5.00 5.00 0.40 0.50 bsc. 0.30 0.25 4.90 4.90 0.50 - - 5.10 5.10 32l 5x5 0.20 ref. 0.75 0.02 nom. 0 0.70 min. 0.05 0.80 max. 0.20 0.25 0.30 down bonds allowed no yes 3.10 3.00 3.20 3.10 3.00 3.20 t2055-3 3.10 3.00 3.20 3.10 3.00 3.20 t2055-4 t2855-3 3.15 3.25 3.35 3.15 3.25 3.35 t2855-6 3.15 3.25 3.35 3.15 3.25 3.35 t2855-4 2.60 2.70 2.80 2.60 2.70 2.80 t2855-5 2.60 2.70 2.80 2.60 2.70 2.80 t2855-7 2.60 2.70 2.80 2.60 2.70 2.80 3.20 3.00 3.10 t3255-3 3.20 3.00 3.10 3.20 3.00 3.10 t3255-4 3.20 3.00 3.10 no no no no no no no no yes yes yes yes 3.20 3.00 t1655-2 3.10 3.00 3.10 3.20 yes no 3.20 3.10 3.00 3.10 t1655n-1 3.00 3.20 3.35 3.15 t2055-5 3.25 3.15 3.25 3.35 y 3.35 3.15 t2855n-1 3.25 3.15 3.25 3.35 n 3.35 3.15 t2855-8 3.25 3.15 3.25 3.35 y 3.20 3.10 t3255n-1 3.00 no 3.20 3.10 3.00 l 0.40 0.40 ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** see common dimensions table 0.15 11. marking is for package orientation reference only. g 2 2 21-0140 package outline, 16, 20, 28, 32l thin qfn, 5x5x0.8mm -drawing not to scale- 12. number of leads shown are for reference only.

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